Metal and silicon containing capping layers for interconnects
US8753978B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2012 |
| Grant date | Jun 17, 2014 |
| Priority date | — |
| Expiry date | Aug 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76883
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed methods cap exposed surfaces of copper lines with a layer of metal or metal-containing compound combined with silicon. In some cases, the metal or metal-containing compound forms an atomic layer. In certain embodiments, the methods involve exposing the copper surface first to a metal containing precursor to form an atomic layer of adsorbed precursor or metal atoms, which may optionally be converted to an oxide, nitride, carbide, or the like by, e.g., a pinning treatment. Subsequent exposure to a silicon-containing precursor may proceed with or without metallic atoms being converted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.