Method for manufacturing epitaxial wafer
US8759229B2 · kind B2 · utility
1Cited by
9References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2007 |
| Grant date | Jun 24, 2014 |
| Priority date | — |
| Expiry date | Aug 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02658
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing an epitaxial wafer that can reduce occurrence of a surface defect or a slip formed on an epitaxial layer is provided. The manufacturing method is characterized by comprising: a smoothing step of controlling application of an etchant to a wafer surface in accordance with a surface shape of a silicon wafer to smooth the wafer surface; and an epitaxial layer forming step of forming an epitaxial layer formed of a silicon single crystal on the surface of the wafer based on epitaxial growth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.