Inventor · Tokyo, JP

Takeo Katoh

14Patents
3h-index
18Co-inventors
53Inventor score

Filing activity: Apr 2, 2004 → Jan 14, 2014

Most-cited inventions

PatentTitleAreaCited byStatus
US7491342B2 Bonded semiconductor substrate manufacturing method thereof Electricity 31 Expired
US7488400B2 Apparatus for etching wafer by single-wafer process Emerging Cross-Sectional Technologies 3 Active
US8147295B2 Method of polishing silicon wafer Electricity 3 Active
US7601644B2 Method for manufacturing silicon wafers Electricity 3 Expired
US8379196B2 Method for judging whether semiconductor wafer is non-defective wafer by using laser scattering method Physics 2 Active
US7906438B2 Single wafer etching method Electricity 2 Active
US8466071B2 Method for etching single wafer Electricity 2 Active
US8877643B2 Method of polishing a silicon wafer Emerging Cross-Sectional Technologies 1 Active
US8759229B2 Method for manufacturing epitaxial wafer Electricity 1 Active
US7648890B2 Process for producing silicon wafer Electricity 0 Active
US10177008B2 Silicon wafer and method for manufacturing the same Electricity 0 Active
US7833908B2 Slurry composition for chemical-mechanical polishing capable of compensating nanotopography effect and method for planarizing surface of semiconductor device using the same Electricity 0 Expired
US8066896B2 Apparatus for etching wafer by single-wafer process and single wafer type method for etching wafer Emerging Cross-Sectional Technologies 0 Active
US7955982B2 Method for smoothing wafer surface and apparatus used therefor Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.