Method for substrate preservation during transistor fabrication
US8778786B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2012 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Sep 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31133
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Silicon loss prevention in a substrate during transistor device element manufacture is achieved by limiting a number of photoresist mask and chemical oxide layer stripping opportunities during the fabrication process. This can be achieved through the use of a protective layer that remains on the substrate during formation and stripping of photoresist masks used in identifying the implant areas into the substrate. In addition, undesirable reworking steps due to photoresist mask misalignment are eliminated or otherwise have no effect on consuming silicon from the substrate during fabrication of device elements. In this manner, device elements with the same operating characteristics and performance can be consistently made from lot to lot.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.