Solder bump connections
US8778792B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2013 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Feb 4, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Solder bump connections and methods for fabricating solder bump connections. The method includes forming a layer stack containing first and second conductive layers, forming a dielectric passivation layer on a top surface of the second conductive layer, and forming a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer. The method further includes forming a conductive plug in the via opening. The solder bump connection includes first and second conductive layers comprised of different conductors, a dielectric passivation layer on a top surface of the second conductive layer, a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer, and a conductive plug in the via opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.