Semiconductor structure and method for making same

US8786085B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Hans-Joachim Barth · Munich, DE
• Mathias Vaupel · Regensburg, DE
• Rainer Steiner · Regensburg, DE
• Werner Robl · Regensburg, DE
• Jens Pohl · San Luis Obispo, US
• Joern Plagmann · Munich, DE
• Gottfried Beer · Nittendorf, DE

Key dates

• Filing date: Nov 8, 2012
• Grant date: Jul 22, 2014
• Expiry date: Nov 8, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15788
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

One or more embodiments relate to a semiconductor structure, comprising: a barrier layer overlying a workpiece surface; a seed layer overlying the barrier layer; an inhibitor layer overlying said seed layer, the inhibitor layer having a opening exposing a portion of the seed layer, and a fill layer overlying the exposed portion of the seed layer.