Methods of forming bulk FinFET devices with replacement gates so as to reduce punch through leakage currents
US8809178B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 29, 2012 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Mar 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/024
Abstract
One illustrative method disclosed herein includes forming a plurality of spaced-apart trenches in a semiconducting substrate to thereby define a fin structure for the device, forming a local isolation region within each of the trenches, forming a sacrificial gate structure on the fin structure, wherein the sacrificial gate structure comprises at least a sacrificial gate electrode, and forming a layer of insulating material above the fin structure and within the trench above the local isolation region. In this example, the method further includes performing at least one etching process to remove the sacrificial gate structure to thereby define a gate cavity, after removing the sacrificial gate structure, performing at least one etching process to form a recess in the local isolation region, and forming a replacement gate structure that is positioned in the recess in the local isolation region and in the gate cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.