Method and apparatus for high-K gate performance improvement and combinatorial processing
US8821985B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2012 |
| Grant date | Sep 2, 2014 |
| Priority date | — |
| Expiry date | Nov 2, 2032 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB01J2219/00756
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Methods and apparatuses for combinatorial processing are disclosed. Methods include introducing a substrate into a processing chamber. Methods further include forming a first film on a surface of a first site-isolated region on the substrate and forming a second film on a surface of a second site-isolated region on the substrate. The methods further include exposing the first film to a plasma having a first source gas to form a first treated film on the substrate and exposing the second film to a plasma having a second source gas to form a second treated film on the substrate without etching the first treated film in the processing chamber. In addition, methods include evaluating results of the treated films post processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.