Patent · US Active

Method for improving thermal stability of metal gate

US8835294B2 · kind B2 · utility

7Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 16, 2010
Grant dateSep 16, 2014
Priority date
Expiry dateNov 27, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming a gate structure on the substrate, the gate structure including a dummy gate, removing the dummy gate from the gate structure thereby forming a trench, forming a work function metal layer partially filling the trench, forming a fill metal layer filling a remainder of the trench, performing a chemical mechanical polishing (CMP) to remove portions of the metal layers outside the trench, and implanting Si, C, or Ge into a remaining portion of the fill metal layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.