Han-Guan Chew
12Patents
3h-index
17Co-inventors
49Inventor score
Filing activity: May 21, 2008 → Oct 21, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8304831B2 | Method and apparatus of forming a gate | Electricity | 14 | Active |
| US8835294B2 | Method for improving thermal stability of metal gate | Electricity | 7 | Active |
| US8304842B2 | Interconnection structure for N/P metal gates | Electricity | 7 | Active |
| US8378428B2 | Metal gate structure of a semiconductor device | Electricity | 3 | Active |
| US8609484B2 | Method for forming high-K metal gate device | Electricity | 3 | Active |
| US8586428B2 | Interconnection structure for N/P metal gates | Electricity | 3 | Active |
| US9105692B2 | Method of fabricating an interconnection structure in a CMOS comprising a step of forming a dummy electrode | Electricity | 2 | Active |
| US8668833B2 | Method of forming a nanostructure | Emerging Cross-Sectional Technologies | 1 | Active |
| US8664079B2 | Method of fabricating semiconductor device by thinning hardmask layers on frontside and backside of substrate | Electricity | 0 | Active |
| US8143137B2 | Method of fabricating semiconductor device by thinning hardmask layers on frontside and backside of substrate | Electricity | 0 | Active |
| US9355874B2 | Silicon nitride etching in a single wafer apparatus | Electricity | 0 | Active |
| US8415236B2 | Methods for reducing loading effects during film formation | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.