Semiconductor device and method of forming pre-molded substrate to reduce warpage during die molding
US8836097B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2013 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Feb 16, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a substrate with a plurality of conductive vias formed through the substrate and conductive layer formed over the substrate. A first encapsulant is deposited over the substrate outside a die attach area of the substrate. The first encapsulant surrounds each die attach area over the substrate and the die attach area is devoid of the first encapsulant. A channel connecting adjacent die attach areas is also devoid of the first encapsulant. A first semiconductor die is mounted over the substrate within the die attach area after forming the first encapsulant. A second semiconductor die is mounted over the first die within the die attach area. An underfill material can be deposited under the first and second die. A second encapsulant is deposited over the first and second die and first encapsulant. The first encapsulant reduces warpage of the substrate during die mounting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.