Circuit for generating negative bitline voltage
US8837229B1 · kind B1 · utility
10Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2013 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Aug 2, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/07
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit for generating a negative bitline voltage comprises a bitline connectable to a memory cell and a multitude of capacitors arranged in groups thereof connected to the bitline. A step signal generator can generate a consecutive sequence of step signals to be applied to a group of capacitors. The circuit may be part of an integrated memory circuit device to drive the bitline to a negative voltage to implement a write assist scheme.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.