Prashant Dubey
42Patents
8h-index
47Co-inventors
75Inventor score
Filing activity: May 30, 2000 → Oct 9, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10826492B2 | Power gating in stacked die structures | Electricity | 20 | Active |
| US6917921B1 | Method and apparatus for distributing it management practice information | Emerging Cross-Sectional Technologies | 15 | Expired |
| US6470475B2 | Synthesizable synchronous static RAM | Physics | 11 | Expired |
| US10836306B1 | Vehicle with portable signature light assembly | Physics | 11 | Active |
| US7603603B2 | Configurable memory architecture with built-in testing mechanism | Physics | 11 | Active |
| US8837229B1 | Circuit for generating negative bitline voltage | Electricity | 10 | Active |
| US8638175B2 | Coupled ring oscillator | Electricity | 10 | Active |
| US9281030B2 | Controlling timing of negative charge injection to generate reliable negative bitline voltage | Physics | 9 | Active |
| US6650162B2 | Digital clock generator circuit with built-in frequency and duty cycle control | Electricity | 7 | Expired |
| US8108744B2 | Locally synchronous shared BIST architecture for testing embedded memories with asynchronous interfaces | Physics | 6 | Active |
| US10589723B1 | Imaging system | Physics | 6 | Active |
| US7954017B2 | Multiple embedded memories and testing components for the same | Physics | 6 | Active |
| US8046655B2 | Area efficient memory architecture with decoder self test and debug capability | Physics | 4 | Active |
| US10790013B1 | Read-write architecture for low voltage SRAMs | Physics | 4 | Active |
| US7248066B2 | On-chip analysis and computation of transition behavior of embedded nets in integrated circuits | Physics | 4 | Expired |
| US8386864B2 | Locally synchronous shared BIST architecture for testing embedded memories with asynchronous interfaces | Physics | 4 | Active |
| US10597002B1 | Imaging system | Physics | 4 | Active |
| US10627092B2 | Vehicle grille assembly | Physics | 3 | Active |
| US10867665B1 | Reset before write architecture and method | Physics | 2 | Active |
| US8352781B2 | System and method for efficient detection and restoration of data storage array defects | Physics | 2 | Active |
| US8055956B2 | Built-in self-repairable memory | Physics | 2 | Active |
| US10524396B2 | Sensor assembly with cooling | Electricity | 2 | Active |
| US8456197B2 | Differential data sensing | Electricity | 2 | Active |
| US10627488B2 | Cooling sensor apparatus | Physics | 2 | Active |
| US10576881B2 | Autonomous vehicle B-pillar proximity warning system | Physics | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.