Patent · US Active

Method and apparatus for ultra thin wafer backside processing

US8846532B2 · kind B2 · utility

8Cited by
2References
4Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 16, 2012
Grant dateSep 30, 2014
Priority date
Expiry dateSep 16, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/00014
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method and apparatus for ultra thin wafer backside processing are disclosed. The apparatus includes an outer ring holding a high temperature grinding and/or dicing tape to form a support structure. An ultra thin wafer or diced wafer is adhered to the tape within the ring for wafer backside processing. The wafer backside processing includes ion implantation, annealing, etching, sputtering and evaporation while the wafer is in the support structure. Alternative uses of the support structure are also disclosed including the fabrication of dies having metalized side walls.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.