Leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnect
US8866275B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2013 |
| Grant date | Oct 21, 2014 |
| Priority date | — |
| Expiry date | Feb 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0384
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a substrate with a plurality of conductive vias formed through the substrate and first conductive layer formed over the substrate. A first semiconductor die is mounted over the substrate. A second semiconductor die can be mounted over the first semiconductor die. A leadframe interposer has a base plate and a plurality of base leads extending from the base plate. An etch-resistant conductive layer is formed over a surface of the base plate opposite the base leads. The leadframe is mounted to the substrate over the first semiconductor die. An encapsulant is deposited over the substrate and first semiconductor die. The base plate is removed while retaining the etch-resistant conductive layer and portion of the base plate opposite the base leads to electrically isolate the base leads. An interconnect structure is formed over a surface of the substrate opposite the base leads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.