Pillar-based interconnects for magnetoresistive random access memory

US8884387B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Solomon Assefa · Ossining, US
• Michael C. Gaidis · Yorktown Heights, US
• Eric A. Joseph · White Plains, US
• Eugene J. O'Sullivan · Nyack, US

Key dates

• Filing date: Aug 7, 2012
• Grant date: Nov 11, 2014
• Expiry date: Nov 25, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N50/10

Abstract

A semiconductor device includes a substrate including an M2 patterned area. A VA pillar structure is formed over the M2 patterned area. The VA pillar structure includes a substractively patterned metal layer. The VA pillar structure is a sub-lithographic contact. An MTJ stack is formed over the oxide layer and the metal layer of the VA pillar. A size of the MTJ stack and a shape anisotropy of the MTJ stack are independent of a size and a shape anisotropy of the sub-lithographic contact.