Method of making an insulated gate semiconductor device and structure
US8889532B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2011 |
| Grant date | Nov 18, 2014 |
| Priority date | — |
| Expiry date | Dec 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/663
Abstract
In one embodiment, a vertical insulated-gate field effect transistor includes a shield electrode formed in trench structure within a semiconductor material. A gate electrode is isolated from the semiconductor material using gate insulating layers. Before the shield electrode is formed, spacer layers can be used form shield insulating layers along portions of the trench structure. The shield insulating layers are thicker than the gate insulating layers. In another embodiment, the shield insulating layers have variable thickness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.