Method for forming narrow structures in a semiconductor device
US8901720B2 · kind B2 · utility
0Cited by
8References
16Claims
0Family size
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Key dates
| Filing date | Mar 9, 2011 |
| Grant date | Dec 2, 2014 |
| Priority date | — |
| Expiry date | May 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/024
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming multiple conductive structures in a semiconductor device includes forming spacers adjacent side surfaces of a mask, where the mask and the spacers are formed on a conductive layer. The method also includes etching at least one trench in a portion of the conductive layer not covered by the spacers or the mask. The method may further include depositing a material over the semiconductor device, removing the mask and etching the conductive layer to remove portions of the conductive layer not covered by the spacers or the material, where remaining portions of the conductive layer form the conductive structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.