Gate silicidation

US8906794B1 · kind B1 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Joachim Patzer · Rohrbach, DE
• Ardechir Pakfar · Dresden, DE
• Clemens Fitz · Dresden, DE
• Dominic Thurmer · Dresden, DE

Key dates

• Filing date: Aug 1, 2013
• Grant date: Dec 9, 2014
• Expiry date: Aug 1, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/83
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for performing silicidation of gate electrodes includes providing a semiconductor device having first and second transistors with first and second gate electrodes formed on a semiconductor substrate, forming an oxide layer on the first and second gate electrodes and the semiconductor substrate, forming a cover layer on the oxide layer, and back etching the cover layer to expose portions of the oxide layer above the first and second gate electrodes while maintaining a portion of the cover layer between the first and second gate electrodes. Furthermore, the exposed portions of the oxide layer are removed from the first and second gate electrodes to expose upper portions of the first and second gate electrodes, while maintaining a portion of the oxide layer between the first and second gate electrodes, and a silicidation of the exposed upper portions of the first and second gate electrodes is performed.