Patent · US Active

Data bus inversion coding

US8909840B2 · kind B2 · utility

7Cited by
7References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 19, 2011
Grant dateDec 9, 2014
Priority date
Expiry dateJul 8, 2032

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Techniques are disclosed relating to data inversion encoding. In one embodiment, an apparatus includes an interface circuit. The interface circuit is configured to perform first and second data bursts that include respective pluralities of data transmissions encoded using an inversion coding scheme. In such an embodiment, the initial data transmission of the second data burst is encoded using the final data transmission of the first data burst. In some embodiments, the first and second data bursts correspond to successive write operations or successive read operations to a memory module from a memory PHY.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.