Method and apparatus for adjusting threshold voltage in a replacement metal gate integration
US8912085B1 · kind B1 · utility
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17Claims
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Key dates
| Filing date | Sep 4, 2013 |
| Grant date | Dec 16, 2014 |
| Priority date | — |
| Expiry date | Sep 4, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A methodology for enabling a gate stack integration process that provides additional threshold voltage margin without sacrificing gate reliability and the resulting device are disclosed. Embodiments include conformally forming a margin adjusting layer in a gate trench, forming a metal capping layer on the margin adjusting layer, and forming an n-type work function (nWF) metal layer on the metal capping layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.