Method of forming step doping channel profile for super steep retrograde well field effect transistor and resulting device
US8916442B2 · kind B2 · utility
1Cited by
2References
12Claims
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Key dates
| Filing date | Jan 17, 2013 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Jan 17, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A methodology enabling the formation of steep channel profiles for devices, such as SSRW FETs, having a resultant channel profiles that enables suppression of threshold voltage variation and the resulting device are disclosed. Embodiments include providing STI regions in a silicon wafer; performing a deep well implantation of a dopant into the silicon wafer between STI regions; forming a recess in the doped silicon wafer between the STI regions; performing a shallow well implantation of the dopant into the silicon wafer in the recess; and forming Si:C on the doped silicon wafer in the recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.