Uniform finFET gate height

US8928057B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• William J. Cote · Poughquag, US
• Johnathan E. Faltermeier · San Jose, US
• Babar A. Khan · Ossining, US
• Ravikumar Ramachandran · Beacon, US
• Theodorus E. Standaert · Clifton Park, US
• Xinhui Wang · Poughkeepsie, US

Key dates

• Filing date: Nov 30, 2012
• Grant date: Jan 6, 2015
• Expiry date: Nov 30, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/215

Abstract

A method including providing fins etched from a semiconductor substrate and covered by an oxide layer and a nitride layer, the oxide layer being located between the fins and the nitride layer, removing a portion of the fins to form an opening, forming a dielectric spacer on a sidewall of the opening, and filling the opening with a fill material, wherein a top surface of the fill material is substantially flush with a top surface of the nitride layer. The method may further include forming a deep trench capacitor in-line with one of the fins, removing the nitride layer to form a gap between the fins and the fill material, wherein the fill material has re-entrant geometry extending over the gap, and removing the re-entrant geometry and causing the gap between the fins and the fill material to widen.