Patent · US Active

Cache management for memory operations

US8935475B2 · kind B2 · utility

1Cited by
11References
20Claims
0Family size

Assignees

Inventors

Key dates

Filing dateMar 30, 2012
Grant dateJan 13, 2015
Priority date
Expiry dateMar 22, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/128
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Embodiments of the present invention provides for the execution of threads and/or workitems on multiple processors of a heterogeneous computing system in a manner that they can share data correctly and efficiently. Disclosed method, system, and article of manufacture embodiments include, responsive to an instruction from a sequence of instructions of a work-item, determining an ordering of visibility to other work-items of one or more other data items in relation to a particular data item, and performing at least one cache operation upon at least one of the particular data item or the other data items present in any one or more cache memories in accordance with the determined ordering. The semantics of the instruction includes a memory operation upon the particular data item.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.