Semiconductor arrangement with a superjunction transistor and a further device integrated in a common semiconductor body

US8941188B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Armin Willmeroth · Friedberg, DE
• Franz Hirler · Isen, DE
• Peter Irsigler · Ried im Innkreis, AT

Key dates

• Filing date: Mar 26, 2012
• Grant date: Jan 27, 2015
• Expiry date: Jul 17, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/673

Abstract

A semiconductor arrangement includes a semiconductor body and a power transistor arranged in a first device region of the semiconductor body. The power transistor includes at least one source region, a drain region, and at least one body region, at least one drift region of a first doping type and at least one compensation region of a second doping complementary to the first doping type, and a gate electrode arranged adjacent to the at least one body region and dielectrically insulated from the body region by a gate dielectric. The semiconductor arrangement also includes a further semiconductor device arranged in a second device region of the semiconductor body. The second device region includes a well-like structure of the second doping type surrounding a first semiconductor region of the first doping type. The further semiconductor device includes device regions arranged in the first semiconductor region.