Patent · US Active

Superior integrity of a high-K gate stack by forming a controlled undercut on the basis of a wet chemistry

US8951901B2 · kind B2 · utility

1Cited by

8References

18Claims

0Family size

Assignee

GlobalFoundries Inc. · KY

Inventors

Sven Beyer · Dresden, DE
Berthold Reimer · Dresden, DE
Falk Graetsch · Dresden, DE

Key dates

Filing date	Jul 22, 2011
Grant date	Feb 10, 2015
Priority date	—
Expiry date	Sep 18, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH10D64/685
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

In sophisticated semiconductor devices, the encapsulation of sensitive gate materials, such as a high-k dielectric material and a metal-containing electrode material, which are provided in an early manufacturing stage may be achieved by forming an undercut gate configuration. To this end, a wet chemical etch sequence is applied after the basic patterning of the gate layer stack, wherein at least ozone-based and hydrofluoric acid-based process steps are performed in an alternating manner, thereby achieving a substantially self-limiting removal behavior.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.