DRAM MIM capacitor using non-noble electrodes
US8969169B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2013 |
| Grant date | Mar 3, 2015 |
| Priority date | — |
| Expiry date | Sep 26, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/03
Abstract
A method for forming a capacitor stack includes forming a first bottom electrode layer including a conductive metal nitride material. A second bottom electrode layer is formed above the first bottom electrode layer. The second bottom electrode layer includes a conductive metal oxide material, wherein the crystal structure of the conductive metal oxide material promotes a desired high-k crystal phase of a subsequently deposited dielectric layer. A dielectric layer is formed above the second bottom electrode layer. Optionally, an oxygen-rich metal oxide layer is formed above the dielectric layer. Optionally, a third top electrode layer is formed above the oxygen-rich metal oxide layer. The third top electrode layer includes a conductive metal oxide material. A fourth top electrode layer is formed above the third top electrode layer. The fourth top electrode layer includes a conductive metal nitride material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.