Methods and structures for reducing stress on die assembly
US8970026B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2013 |
| Grant date | Mar 3, 2015 |
| Priority date | — |
| Expiry date | Mar 25, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/20106
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A first set of electrically conductive cladding is disposed on an inner section of one external side of a package substrate. The first set electrically conductive cladding is fabricated with a first solder compound. A second set of electrically conductive cladding is disposed on an outer section of the one external side of the substrate. The second set of electrically conductive cladding consists of a second solder compound. The outer section can be farther away from a center of the one external side of the substrate than the inner section. During a reflow process, the first and second solder compounds are configured to become completely molten when heated and the first solder compound solidifies at a higher temperature during cool down than the second solder compound.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.