Patent · US Active

III-V semiconductor structures with diminished pit defects and methods for forming the same

US8975165B2 · kind B2 · utility

0Cited by

9References

17Claims

0Family size

Assignee

SOITEC · FR

Inventors

Christophe Figuet · Crolles, FR
Ed Lindow · Scottsdale, US
Pierre Tomasini · Tempe, US

Key dates

Filing date	Feb 17, 2011
Grant date	Mar 10, 2015
Priority date	—
Expiry date	Jul 23, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH10D62/8503
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Embodiments relate to semiconductor structures and methods of forming them. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. An In-III-V semiconductor layer is grown with an Indium concentration above a saturation regime by adjusting growth conditions such as a temperature of a growth surface to create a super-saturation regime wherein the In-III-V semiconductor layer will grow with a diminished density of V-pits relative to the saturation regime.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.