Inventor · Crolles, FR

Christophe Figuet

23Patents
7h-index
27Co-inventors
65Inventor score

Filing activity: Apr 2, 2002 → Mar 31, 2017

Most-cited inventions

PatentTitleAreaCited byStatus
US7459374B2 Method of manufacturing a semiconductor heterostructure Electricity 17 Active
US6959863B2 Method for selectively transferring at least an element from an initial support onto a final support Electricity 17 Expired
US7608526B2 Strained layers within semiconductor buffer structures Electricity 15 Active
US7825401B2 Strained layers within semiconductor buffer structures Electricity 11 Active
US7387953B2 Laminated layer structure and method for forming the same Electricity 11 Active
US7772127B2 Semiconductor heterostructure and method for forming same Electricity 9 Expired
US8148252B1 Methods of forming III/V semiconductor materials, and semiconductor structures formed using such methods Electricity 8 Active
US7544976B2 Semiconductor heterostructure Electricity 4 Active
US9716029B2 Method for transferring a layer of a semiconductor and substrate comprising a confinement structure Electricity 3 Active
US8084784B2 Semiconductor heterostructure and method for forming same Electricity 3 Active
US11251265B2 Carrier for a semiconductor structure Electricity 2 Active
US8575010B2 Method for fabricating a semiconductor substrate Electricity 2 Active
US9437473B2 Method for separating at least two substrates along a selected interface Electricity 2 Active
US10250282B2 Structure for radiofrequency applications Emerging Cross-Sectional Technologies 2 Active
US9198294B2 Electronic device for radiofrequency or power applications and process for manufacturing such a device Electricity 1 Active
US9646825B2 Method for fabricating a composite structure to be separated by exfoliation Electricity 1 Active
US8329571B2 Deposition methods for the formation of III/V semiconductor materials, and related structures Electricity 1 Active
US8309437B2 (110) oriented silicon substrate and a bonded pair of substrates comprising said (110) oriented silicon substrate Electricity 0 Active
US11205702B2 Method for manufacturing a structure for forming a tridimensional monolithic integrated circuit Electricity 0 Active
US10093086B2 Method for separating at least two substrates along a selected interface Electricity 0 Active
US8975165B2 III-V semiconductor structures with diminished pit defects and methods for forming the same Electricity 0 Active
US9276070B2 Semiconductor structures including stacks of indium gallium nitride layers Electricity 0 Active
US8742428B2 Deposition methods for the formation of III/V semiconductor materials, and related structures Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.