Pre-charge during programming for 3D memory using gate-induced drain leakage
US8988939B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2014 |
| Grant date | Mar 24, 2015 |
| Priority date | — |
| Expiry date | May 15, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/71
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a programming operation of a 3D stacked non-volatile memory device, the channel of an inhibited NAND string is pre-charged by gate-induced drain leakage (GIDL) to achieve a high level of boosting which prevents program disturb in inhibited storage elements. In a program-verify iteration, prior to applying a program pulse, the drain-side select gate transistor is reverse biased to generate GIDL, causing the channel to be boosted to a pre-charge level such as 1.5V. Subsequently, when the program pulse is applied to a selected word line and pass voltages are applied to unselected word lines, the channel is boosted higher from the pre-charge level due to capacitive coupling. The pre-charge is effective even for a NAND string that is partially programmed because it does not rely on directly driving the channel from the bit line end.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.