Bulk fin-field effect transistors with well defined isolation
US8999774B2 · kind B2 · utility
19Cited by
6References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2013 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Oct 15, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process fabricates a fin field-effect-transistor by implanting a dopant into an exposed portion of a semiconductor substrate within a cavity. The cavity is formed in a dielectric layer on the semiconductor substrate. The cavity exposes the portion of the semiconductor substrate within the cavity. A semiconductor layer is epitaxially grown within the cavity atop the dopant implanted exposed portion of the semiconductor substrate. A height of the cavity defines a height of the epitaxially grown semiconductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.