Fabrication of trench DMOS device having thick bottom shielding oxide
US9000514B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2012 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Aug 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
Abstract
Semiconductor device fabrication method and devices are disclosed. A device may be fabricated by forming in a semiconductor layer; filling the trench with an insulating material; removing selected portions of the insulating material leaving a portion of the insulating material in a bottom portion of the trench; forming one or more spacers on one or more sidewalls of a remaining portion of the trench; anisotropically etching the insulating material in the bottom portion of the trench using the spacers as a mask to form a trench in the insulator; removing the spacers; and filling the trench in the insulator with a conductive material. Alternatively, an oxide-nitride-oxide (ONO) structure may be formed on a sidewall and at a bottom of the trench and one or more conductive structures may be formed in a portion of the trench not occupied by the ONO structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.