Integrated circuit comprising a clock tree cell
US9000840B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 19, 2013 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Dec 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6734
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An integrated with a block including first and second oppositely doped semiconductor wells. There are standard cells placed next to one another, each standard cell including first transistors and a clock tree cell encircled by standard cells. The clock tree cell has a third semiconductor well with the same doping type as the doping of the first well and second transistors. The clock tree cell also has a semiconductor strip extending continuously around the third well and having the opposite doping type to the doping of the third well to electrically isolate the third well from the first well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.