Continuity check monitoring for microchip exploitation detection
US9003559B2 · kind B2 · utility
6Cited by
20References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2008 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Sep 29, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/87
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus, method and program product detect an attempt to tamper with a microchip by determining that an electrical path comprising one or more connections and a metal plate attached to the backside of a microchip has become disconnected or otherwise altered. A tampering attempt may also be detected in response to the presence of an electrical path that should not be present, as may result from the microchip being incorrectly reconstituted. Actual and/or deceptive paths may be automatically selected and monitored to further confound a reverse engineering attempt.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.