Fabrication method of packaging substrate, and fabrication method of semiconductor package
US9006039B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2014 |
| Grant date | Apr 14, 2015 |
| Priority date | — |
| Expiry date | Jul 2, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fabrication method of a packaging substrate includes: providing a metal board having a first surface and a second surface opposite to the first surface, wherein the first surface has a plurality of first openings for defining a first core circuit layer therebetween, the second surface has a plurality of second openings for defining a second core circuit layer therebetween, each of the first and second openings has a wide outer portion and a narrow inner portion, and the inner portion of each of the second openings is in communication with the inner portion of a corresponding one of the first openings; forming a first encapsulant in the first openings; forming a second encapsulant in the second openings; and forming a surface circuit layer on the first encapsulant and the first core circuit layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.