In situ doping and diffusionless annealing of embedded stressor regions in PMOS and NMOS devices

US9012277B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Stefan Flachowsky · Dresden, DE
• Ralf Illgen · Dresden, DE

Key dates

• Filing date: Jan 9, 2012
• Grant date: Apr 21, 2015
• Expiry date: Jun 25, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/691
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Generally, the present disclosure is directed to methods for forming dual embedded stressor regions in semiconductor devices such as transistor elements and the like, using in situ doping and substantially diffusionless annealing techniques. One illustrative method disclosed herein includes forming first and second cavities in PMOS and NMOS device regions, respectively, of a semiconductor substrate, and thereafter performing first and second epitaxial deposition processes to form in situ doped first and second embedded material regions in the first and second cavities, respectively. The method further includes, among other things, performing a single heat treating process to activate dopants in the in situ doped first and second embedded material regions.