Patent · US Active

Ultrathin body fully depleted silicon-on-insulator integrated circuits and methods for fabricating same

US9023713B2 · kind B2 · utility

4Cited by
0References
17Claims
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Key dates

Filing dateJun 22, 2012
Grant dateMay 5, 2015
Priority date
Expiry dateMar 14, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/68
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing an ultrathin body (UTB) fully depleted silicon-on-insulator (FDSOI) substrate. A PFET temporary gate structure and an NFET temporary gate structure are formed on the substrate. The method implants ions to form lightly doped active areas around the gate structures. A diffusionless annealing process is performed on the active areas. Further, a compressive strain region is formed around the PFET gate structure and a tensile strain region is formed around the NFET gate structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.