Semiconductor device with a super junction structure with one, two or more pairs of compensation layers

US9024383B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Stefan Gamerith · Villach, AT
• Armin Willmeroth · Friedberg, DE
• Franz Hirler · Isen, DE

Key dates

• Filing date: May 1, 2013
• Grant date: May 5, 2015
• Expiry date: May 1, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D8/00

Abstract

A super junction semiconductor device comprises a semiconductor portion with mesa regions protruding from a base section. The mesa regions are spatially separated in a lateral direction parallel to a first surface of the semiconductor portion. A compensation structure with at least two first compensation layers of a first conductivity type and at least two second compensation layers of a complementary second conductivity type may cover sidewalls of the mesa regions and portions of the base section between the mesa regions. Buried lateral faces of segments of the compensation structure may cut the first and second compensation layers between the mesa regions. A drain connection structure of the first conductivity type may extend along the buried lateral faces and may structurally connect the first compensation layers in an economic way keeping the thermal budget low.