Integrated circuit packaging system with posts and method of manufacture thereof
US9082887B1 · kind B1 · utility
0Cited by
11References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2013 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Aug 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a semiconductor wafer having a chip pad; attaching a wafer frame to the semiconductor wafer, the wafer frame having a horizontal cover integral to a protruding connector with the protruding connector on the chip pad; forming an underfill around the protruding connector and between the horizontal cover and the semiconductor wafer; removing the horizontal cover exposing the underfill and the protruding connector; and singulating an integrated circuit package from the semiconductor wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.