Integrated circuits having FinFETs with improved doped channel regions and methods for fabricating same
US9093476B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2013 |
| Grant date | Jul 28, 2015 |
| Priority date | — |
| Expiry date | Jul 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0193
Abstract
Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming a channel region of a fin structure with a first side, a second side, an exposed first end surface and an exposed second end surface. A gate is formed overlying the first side and second side of the channel region. The method includes implanting ions into the channel region through the exposed first end surface and the exposed second end surface. Further, the method includes forming source/drain regions of the fin structure adjacent the exposed first end surface and the exposed second end surface of the channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.