Molded semiconductor package with backside die metallization

US9099454B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Ulrich Wachter · Regensburg, DE
• Veronika Huber · Bad Abbach, DE
• Thomas Kilger · Regenstauf, DE
• Ralf Otremba · Kaufbeuren, DE
• Bernd Stadler · Donaustauf, DE
• Dominic Maier · Pleystein, DE
• Klaus Schiess · Allensbach, DE
• Andreas Schlögl · Ottobrunn, DE
• Uwe Wahl · Munich, DE

Key dates

• Filing date: Aug 12, 2013
• Grant date: Aug 4, 2015
• Expiry date: Aug 12, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3511
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor package is manufactured by providing a semiconductor die with a terminal at a first side of the die, providing a material coupled to the die at an opposing second side of the die and embedding the die in a molding compound so that the die is covered by the molding compound on all sides except the first side. The molding compound is thinned at a side of the molding compound adjacent the second side of the die, to expose the material at the second side of the die without exposing the second side of the die. An electrical connection is formed to the terminal at the first side of the die. In the case of a transistor die, the terminal can be a source terminal and the transistor die can be attached source-down to a metal block such as a die paddle of a lead frame.