Patent · US Active

Method for fabricating a trench structure, and a semiconductor arrangement comprising a trench structure

US9117874B2 · kind B2 · utility

0Cited by

1References

26Claims

0Family size

Assignee

Infineon Technologies Austria AG · AT

Inventors

Franz Hirler · Isen, DE
Thoralf Kautzsch · Dresden, DE
Anton Mauder · Kolbermoor, DE
Michael Rueb · Faak am See, AT
Hans-Joachim Schulze · Taufkirchen, DE
Helmut Strack · Hersbruck, DE
Armin Willmeroth · Friedberg, DE

Key dates

Filing date	Nov 19, 2013
Grant date	Aug 25, 2015
Priority date	—
Expiry date	Nov 19, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/143
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor device, in which a first trench section is produced proceeding from a surface of a semiconductor body into the semiconductor body. A semiconductor layer is produced above the surface and above the first trench section. A further trench section is produced in the semiconductor layer in such a way that the first trench section and the further trench section form a continuous trench structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.