Methods for fabricating integrated circuits with robust gate electrode structure protection

US9184260B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Joanna Wasyluk · Dresden, DE
• Dominic Thurmer · Dresden, DE
• Ardechir Pakfar · Dresden, DE
• Markus Lenski · Dresden, DE

Key dates

• Filing date: Nov 14, 2013
• Grant date: Nov 10, 2015
• Expiry date: Nov 14, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/822

Abstract

Methods for fabricating an integrated circuit are provided herein. In an embodiment, a method for fabricating an integrated circuit includes forming a gate electrode structure overlying a semiconductor substrate. First sidewall spacers are formed adjacent to sidewalls of the gate electrode structure, and the first sidewall spacers include a nitride. An oxide etchant is applied to a surface of the semiconductor substrate after forming the first sidewall spacers. A second spacer material that includes a nitride is deposited over the semiconductor substrate and the first sidewall spacers to form a second spacer layer after applying the oxide etchant to the surface of the semiconductor substrate. The second spacer layer is etched with a second spacer etchant to form second sidewall spacers.