Super junction semiconductor device comprising a cell area and an edge area

US9184277B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Armin Willmeroth · Friedberg, DE
• Franz Hirler · Isen, DE
• Hans Weber · Villach, AT
• Markus Schmitt · Neubiberg, DE
• Thomas Wahls · Munich, DE
• Rolf Weis · Dresden, DE

Key dates

• Filing date: Oct 31, 2012
• Grant date: Nov 10, 2015
• Expiry date: Oct 31, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/127
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A super junction semiconductor device may include one or more doped zones in a cell area. A drift layer is provided between a doped layer of a first conductivity type and the one or more doped zones. The drift layer includes first regions of the first conductivity type and second regions of a second conductivity type, which is the opposite of the first conductivity type. In an edge area that surrounds the cell area, the first regions may include first portions separating the second regions in a first direction and second portions separating the second regions in a second direction orthogonal to the first direction. The first and second portions are arranged such that a longest second region in the edge area is at most half as long as a dimension of the edge area parallel to the longest second region.