Method of co-integration of strained silicon and strained germanium in semiconductor devices including fin structures
US9196479B1 · kind B1 · utility
28Cited by
8References
20Claims
0Family size
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Key dates
| Filing date | Jul 3, 2014 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Jul 3, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0262
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device that includes forming an at least partially relaxed semiconductor material, and forming a plurality of fin trenches in the partially relaxed semiconductor material. At least a portion of the plurality of fin trenches is filled with a first strained semiconductor material that is formed using epitaxial deposition. A remaining portion of the at least partially relaxed semiconductor material is removed to provide a plurality of fin structure of the first strained semiconductor material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.