Resistive memory and fabricating method thereof
US9196828B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2013 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Jan 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/80
Abstract
A resistive memory and a fabricating method thereof are provided. The resistive memory includes first and second electrodes, a variable resistance material layer, a first dielectric layer, and a second dielectric layer. The first electrode includes a first portion and a second portion. The second electrode is disposed opposite to the first electrode. The variable resistance material layer includes a sidewall and first and second surfaces opposite to each other, wherein the first surface is connected with the first portion of the first electrode and the second surface is electrically connected with the second electrode. The second portion surrounds the sidewall of the variable resistance material layer and is connected with the first portion. The first dielectric layer is disposed between the first and the second electrodes. The second dielectric layer is disposed between the variable resistance material layer and the second portion of the first electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.