Method of fabricating metal gate structure
US9209273B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2014 |
| Grant date | Dec 8, 2015 |
| Priority date | — |
| Expiry date | Aug 20, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a metal gate structure includes providing a substrate on which a dielectric layer, a first trench disposed in the dielectric layer, a first metal layer filling up the first trench, a second trench disposed in the dielectric layer, a second metal layer filling up the second trench are disposed, and the width of the first trench is less than the width of the second trench; forming a mask layer to completely cover the second trench; performing a first etching process to remove portions of the first metal layer when the second trench is covered by the mask layer; and performing a second etching process to concurrently remove portions of the first metal layer and portions of the second metal layer after the first etching process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.