Patent · US Active

Semiconductor device including passivation layer encapsulant

US9214385B2 · kind B2 · utility

0Cited by
20References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 10, 2014
Grant dateDec 15, 2015
Priority date—
Expiry dateMar 20, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/12042
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of fabricating a semiconductor device includes forming a passivation layer on a least one capping layer of the semiconductor device, and forming an encapsulant layer on the passivation layer. The method further includes patterning the encapsulant layer to expose a portion of the passivation layer and forming a final via opening in the passivation layer. A conductive material is deposited in the final via opening. The method further includes planarizing the conductive material until reaching a remaining portion of the encapsulant layer such that the conductive material is flush with the encapsulant layer and the passivation layer is preserved.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.