Trench interconnect having reduced fringe capacitance

US9214429B2 · kind B2 · utility

Assignees

• STMICROELECTRONICS, INC. · US
• International Business Machines Corporation · US

Inventors

• John H. Zhang · Fishkill, US
• Hsueh-Chung Chen · Cohoes, US
• Lawrence A. Clevenger · Saratoga Springs, US
• Yann Mignot · Slingerlands, US
• Carl Radens · Lagrangeville, US
• Richard S. Wise · Beacon, US
• Yannick Loquet · Domène, FR
• Yiheng Xu · Hopewell Junction, US

Key dates

• Filing date: Dec 5, 2013
• Grant date: Dec 15, 2015
• Expiry date: Dec 5, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Ultra-low-k dielectric materials used as inter-layer dielectrics in high-performance integrated circuits are prone to be structurally unstable. The Young's modulus of such materials is decreased, resulting in porosity, poor film strength, cracking, and voids. An alternative dual damascene interconnect structure incorporates deep air gaps into a high modulus dielectric material to maintain structural stability while reducing capacitance between adjacent nanowires. Incorporation of a deep air gap having k=1.0 compensates for the use of a higher modulus film having a dielectric constant greater than the typical ultra-low-k (ULK) dielectric value of about 2.2. The higher modulus film containing the deep air gap is used as an insulator and a means of reducing fringe capacitance between adjacent metal lines. The dielectric layer between two adjacent metal lines thus forms a ULK/high-modulus dielectric bi-layer.